Home > Book Center>Analysis and Optimization on Large-Scale CMOS Integrated Circuits in The Presence of Parameter Variability: from Circuit-Level to System Level

Description

This book studies the transistor aging effect that becomes more serious with application of nanometer technology–negative bias temperature instability and parameter deviation resulting from manufacturing process. This book introduces the physical mechanism of parameter deviation effect and its impact on the reliability of circuit during its service period, and then presents the corresponding analysis, prediction and optimization methods from circuit level to system level.

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